Author: Ragstaff (aegis.itc.gu.edu.au)
Date: 12-10-2002 06:12
Just some extra details about the 68010 seeing as a few people seem curious about it. I read up on it only a month or so ago.
It's basically a 68000 that has been optimised for running virtual systems. It has a few more registers (vector based register, for having alternative vector tables in memory for if you were running different OSs I suppose; source and destination function code registers).
The MOVE from SR instruction is privelaged in the '010, so programs can't tell what mode the CPU is running in... but hmm, I was just thinking, couldn't you try to run the instruction, and if there was an error, you'd know you were in user mode?! Surely it can't be that simple ;o)
As well as that, some general improvements make it run 68000 code about 10% faster.
The most interesting speed improvement for ST users I think is the hardware loop mode optimisation. A two-instruction sequence loop consisting of a one-word instruction and a DBcc instruction with a displacement of -4 is executed without having to refetch the two instructions. This can make memory block moves and searches *much* faster - 2 to 8 times faster I think I read somewhere.
It's meant to be a pin for pin replacement of the 68000, but there is room for some incompatibilities. MOVE from SR obviously - that would run fine on the 68000 but crash on an 010 in user mode.
The 010 adds a word to the bottom of the stack, with some special flags in bits 28-31 for the RTE instruction. So some exception handlers could die... I'm no assembler expert, but I think that's right...?
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